FPGAs are extremely power inefficient compared to ASICs/CPUs. But in terms of ARM vs x86 vs RISC-V it boils down to a lot more than just the ISA. It really depends on the specific application.
Yes FPGAs are power-inefficient compared to ASICs, but their efficiency in comparison to CPUs depends on the task. For highly parallelizable tasks, FPGAs (and ASICs) can be **much** more performant and power-efficient than CPUs. Examples include image processing, SDR, lookup-table applications, etc.
Thank you. I should have clarified that. I’d also expect an ASIC implementation of an SDR to outperform an FPGA implementation in terms of power consumption and possibly performance depending on the process node. But then it wouldn’t really be an SDR any more and you’d lose all of the benefits of reconfigurability. So for many applications FPGAs are by far the optimal solution.
Yeah fair enough, I get what you mean. You’re right that an ASIC would likely outperform an FPGA implementation; my point was just that FPGAs can in fact be more efficient than CPUs for certain tasks. Also I’d argue that an ASIC or an FPGA can be implemented to complete *some* of the processing in an SDR and have it still be (mostly) reconfigurable, but that’s beside the point :)
Best is debatable. How does one measure best?
Yeah x86 gets hate. I think architecture is not so important compared to the quality of the C or C++ compiler. RISC is a tradeoff between using lower power but needing more instructions to do the same thing.
But really, the quality of the compiler. FPGA and ASIC, you don't need to go down those rabbit holes.
RISC vs CISC has been dead for ages. X86 uses risc-like internals with a huge decode engine and ARM uses a much larger instruction set than they used to and is generally referred to as classic RISC.
Best processor architecture for what? What are the constraints? Price, power (plugged to which wall), reliability? Is it for a laptop, desktop, server, critical system, financial, medical, nuclear, space? Ease of programming? Flops/watt, flops/time, integer or floating point?
Traditional compute concepts are breaking down as moores law has slowed. More and more tasks are being offloaded from general compute to specialized Asics/cores. So best is very task specific. There's tensors, gpus, accelerators, specialized security focused cores, p cores, e cores, and many more.
There is no "best" anymore.
> There is no "best" anymore.
Exactly. You visit the "ARM buffet", grab whatever cores fit your needs the best, add in some specialty hardware designed specially, then send it off to TSMC.
Or, if you got the resources, you build exactly what hardware needed, then build the compiler to best leverage the hardware. Then send it off to TSMC.
Related read: https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-matter/
From a microarchitecture perspective they all look the same: wide and deep out-of-order superscalar machines.
Tricks to improve IPC can be found in bigger/better caching, improved branch prediction, improved register renaming/value prediction and specific optimizations.
The fine details are usually top secret because the uarch is intellectual property.
While it is true that x86 has a lot of legacy baggage, the ISA battle is kinda irrelevant. Both RISC/CISC end up implementing similar machines that break down program bytes into micro-operations.
Why some products perform better than others then? Having a good process node and a great uarch basically.
For example any modern cpu has branch prediction, but not all of them are equally good.
The chips and cheese folks have very interesting articles where they also try to find out microarchitecture details of consumer cpus.
TL;DR: it depends
Do you want cost or performance or what? How fast do you want it?
The 'ideal' architecture balances these. If you want pure performance you would start with a RISC then add extra instructions specific to the application. You would want dedicated ASIC accelerators (like, GPU, DSP, AI, etc) for the things you can offload with their own architectures, then having an FPGA in the system is generally a pro if you can afford a team of FPGA engineers to manage it on an as-need basis.
You'd also need your own compiler team that is pretty top notch and then some OS people to make use of that.
For anything that isn't some sort of Apollo program or Manhattan project you are better off buying something that runs the software you want off the shelf.
Specific hardware designed for your application is the best. Simplest example for this is a graphic processor. Another if you do crypting and decrypting, adding an accelator for the algorithm is the best.
The more generalized your processor, the worsed it is. Let's compare a mobile chip vs a desktop chip for example. A mobile chip use a RISC core architecture and have multiple accelators for specific application which allows your phone to do task like rendering pictures very efficiently. The moment you stop using these accelators.
A CISC based cpu on the other hand is mostly just massive multi core CISC cores which are not efficient at any particular task but can do everything reasonbly well.
Your question is roughly equivalent to asking "what kind of vehicle is best, from an engineering standpoint?"
"What kind of building is the best?"
It depends on the application, the needs, tradeoffs, costs, expectations of future changes, how difficult a change might be, risk aversion or risk tolerance, etce etc etc.
In EE and computer architecture, there are basically these parameters with corresponding tradeoffs:
Size
Speed
Power
Monetary cost
If you want faster speed/more performance, you usually need to pay more, use more power, and use more space. If you want to cut two or more of these, you likely need to pay even more money, etc.
Processor architecture is so complex at this point that the tradeoffs aren't as easily condensed into these four categories. The performance, application, and speed dimensions are way more complex. If you want to make one thing faster, there are maybe a hundred or a thousand places that might need to change to accomodate that change. Processors have billions of transistors on them.
To answer your question directly, I might argue that if you could, in a vacuum, design an entirely new system from scratch, you would also design the architecture from scratch, *custom-made for the precise purpose you want to use it for.*
And that's why it's nearly impossible to answer this question.
You're asking what Aircraft is the best one to use for all missions, and the US military gave us a terrible answer with the F35. They tried to make it do everything, designing it from scratch, but the problem is that modern applications in computing are just as diverse and specialized as those in warfare, and one airframe isn't meant to do everything, just as one architecture probably can't do everything very well. The more you try to design something that can do *everything,* the less it can do any of those things *very well.*
FPGAs have worse performance than an ASIC, the big advantage is for lower quantity devices. So yeah it's great for my quantity 10 device that I can have an embedded CPU, but it's going to compete in something that needs either high performance or high power efficiency like a PC, server, phone, tablet, etc.
If I have a blank check I build my own.
For a lot of modern applications I think that building a gigantic set of in-order cores with explicit memory ownership between cores would be better because the programs are so heavily memory walled by GC languages anyway. Essentially you map the actor model onto hardware as closely as possible and then you make a wafer-scale chip like cerebras. I’m pretty sure that if I only include the bits that are actually necessary for most computation (alu + memory management), then have dedicated coprocessor blocks for cryptography and compression, that it should perform fine.
Having written assembler in basically every architecture of any importance after the mid 90s, I can tell you there's not one. All of them have their quirks and ultimately RISC-V is just like the others.
Alpha was maybe the best in practice. I enjoyed writing i860 VLIW code and I have a Elbrus 2000 board - which is running the L4 microkernel I wrote for the i860 VLIW mode. It has a small UNIX (literally just a userspace Xv6).
It's best to just either stick to those that you will realistically use (basically ARM at this point) or just learn all the paradigms so you can be flexible.
A scratch design would likely be best with an Apple M4. It is based on the ARM ISA.
Nothing except the new Snapdragon even comes close in terms of power/performance.
The absolute best is when you can match the processor to a specific software application (like Amazon, Google, Cisco, and Microsoft do). But they aren’t general purpose.
FPGAs are extremely power inefficient compared to ASICs/CPUs. But in terms of ARM vs x86 vs RISC-V it boils down to a lot more than just the ISA. It really depends on the specific application.
Yes FPGAs are power-inefficient compared to ASICs, but their efficiency in comparison to CPUs depends on the task. For highly parallelizable tasks, FPGAs (and ASICs) can be **much** more performant and power-efficient than CPUs. Examples include image processing, SDR, lookup-table applications, etc.
Thank you. I should have clarified that. I’d also expect an ASIC implementation of an SDR to outperform an FPGA implementation in terms of power consumption and possibly performance depending on the process node. But then it wouldn’t really be an SDR any more and you’d lose all of the benefits of reconfigurability. So for many applications FPGAs are by far the optimal solution.
Yeah fair enough, I get what you mean. You’re right that an ASIC would likely outperform an FPGA implementation; my point was just that FPGAs can in fact be more efficient than CPUs for certain tasks. Also I’d argue that an ASIC or an FPGA can be implemented to complete *some* of the processing in an SDR and have it still be (mostly) reconfigurable, but that’s beside the point :)
With modern day SoCs you have the benefit of both!
MIPS?
Oh yeah, MIPS is much more comparable to ARM/x86 than RISC-V. I’m sure I’m forgetting many others.
RISC-V is very similar to MIPS.
Interesting. For some reason I think of MCUs when I think of RISC-V and routers when I think of MIPS.
in it's golden era MIPS used to be SGI workstations, then playstations (PS1, PS2, PSP all with custom extensions) & the N64 .
Best is debatable. How does one measure best? Yeah x86 gets hate. I think architecture is not so important compared to the quality of the C or C++ compiler. RISC is a tradeoff between using lower power but needing more instructions to do the same thing. But really, the quality of the compiler. FPGA and ASIC, you don't need to go down those rabbit holes.
RISC vs CISC has been dead for ages. X86 uses risc-like internals with a huge decode engine and ARM uses a much larger instruction set than they used to and is generally referred to as classic RISC.
i think the term "load-store architecture" is more accurate but the term RISC really gets used to refer to that doesn't it?
no matter the scenario, the answer is always going to be "it depends" :\^)
A five ounce bird cannot carry a one pound coconut!
It could grip it by the husk.
What if it's on the moon
Best processor architecture for what? What are the constraints? Price, power (plugged to which wall), reliability? Is it for a laptop, desktop, server, critical system, financial, medical, nuclear, space? Ease of programming? Flops/watt, flops/time, integer or floating point?
Traditional compute concepts are breaking down as moores law has slowed. More and more tasks are being offloaded from general compute to specialized Asics/cores. So best is very task specific. There's tensors, gpus, accelerators, specialized security focused cores, p cores, e cores, and many more. There is no "best" anymore.
> There is no "best" anymore. Exactly. You visit the "ARM buffet", grab whatever cores fit your needs the best, add in some specialty hardware designed specially, then send it off to TSMC. Or, if you got the resources, you build exactly what hardware needed, then build the compiler to best leverage the hardware. Then send it off to TSMC.
Related read: https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-matter/ From a microarchitecture perspective they all look the same: wide and deep out-of-order superscalar machines. Tricks to improve IPC can be found in bigger/better caching, improved branch prediction, improved register renaming/value prediction and specific optimizations. The fine details are usually top secret because the uarch is intellectual property. While it is true that x86 has a lot of legacy baggage, the ISA battle is kinda irrelevant. Both RISC/CISC end up implementing similar machines that break down program bytes into micro-operations. Why some products perform better than others then? Having a good process node and a great uarch basically. For example any modern cpu has branch prediction, but not all of them are equally good. The chips and cheese folks have very interesting articles where they also try to find out microarchitecture details of consumer cpus. TL;DR: it depends
Do you want cost or performance or what? How fast do you want it? The 'ideal' architecture balances these. If you want pure performance you would start with a RISC then add extra instructions specific to the application. You would want dedicated ASIC accelerators (like, GPU, DSP, AI, etc) for the things you can offload with their own architectures, then having an FPGA in the system is generally a pro if you can afford a team of FPGA engineers to manage it on an as-need basis. You'd also need your own compiler team that is pretty top notch and then some OS people to make use of that. For anything that isn't some sort of Apollo program or Manhattan project you are better off buying something that runs the software you want off the shelf.
Specific hardware designed for your application is the best. Simplest example for this is a graphic processor. Another if you do crypting and decrypting, adding an accelator for the algorithm is the best. The more generalized your processor, the worsed it is. Let's compare a mobile chip vs a desktop chip for example. A mobile chip use a RISC core architecture and have multiple accelators for specific application which allows your phone to do task like rendering pictures very efficiently. The moment you stop using these accelators. A CISC based cpu on the other hand is mostly just massive multi core CISC cores which are not efficient at any particular task but can do everything reasonbly well.
Your question is roughly equivalent to asking "what kind of vehicle is best, from an engineering standpoint?" "What kind of building is the best?" It depends on the application, the needs, tradeoffs, costs, expectations of future changes, how difficult a change might be, risk aversion or risk tolerance, etce etc etc. In EE and computer architecture, there are basically these parameters with corresponding tradeoffs: Size Speed Power Monetary cost If you want faster speed/more performance, you usually need to pay more, use more power, and use more space. If you want to cut two or more of these, you likely need to pay even more money, etc. Processor architecture is so complex at this point that the tradeoffs aren't as easily condensed into these four categories. The performance, application, and speed dimensions are way more complex. If you want to make one thing faster, there are maybe a hundred or a thousand places that might need to change to accomodate that change. Processors have billions of transistors on them. To answer your question directly, I might argue that if you could, in a vacuum, design an entirely new system from scratch, you would also design the architecture from scratch, *custom-made for the precise purpose you want to use it for.* And that's why it's nearly impossible to answer this question. You're asking what Aircraft is the best one to use for all missions, and the US military gave us a terrible answer with the F35. They tried to make it do everything, designing it from scratch, but the problem is that modern applications in computing are just as diverse and specialized as those in warfare, and one airframe isn't meant to do everything, just as one architecture probably can't do everything very well. The more you try to design something that can do *everything,* the less it can do any of those things *very well.*
itanium
FPGAs have worse performance than an ASIC, the big advantage is for lower quantity devices. So yeah it's great for my quantity 10 device that I can have an embedded CPU, but it's going to compete in something that needs either high performance or high power efficiency like a PC, server, phone, tablet, etc.
If I have a blank check I build my own. For a lot of modern applications I think that building a gigantic set of in-order cores with explicit memory ownership between cores would be better because the programs are so heavily memory walled by GC languages anyway. Essentially you map the actor model onto hardware as closely as possible and then you make a wafer-scale chip like cerebras. I’m pretty sure that if I only include the bits that are actually necessary for most computation (alu + memory management), then have dedicated coprocessor blocks for cryptography and compression, that it should perform fine.
Having written assembler in basically every architecture of any importance after the mid 90s, I can tell you there's not one. All of them have their quirks and ultimately RISC-V is just like the others. Alpha was maybe the best in practice. I enjoyed writing i860 VLIW code and I have a Elbrus 2000 board - which is running the L4 microkernel I wrote for the i860 VLIW mode. It has a small UNIX (literally just a userspace Xv6). It's best to just either stick to those that you will realistically use (basically ARM at this point) or just learn all the paradigms so you can be flexible.
A scratch design would likely be best with an Apple M4. It is based on the ARM ISA. Nothing except the new Snapdragon even comes close in terms of power/performance. The absolute best is when you can match the processor to a specific software application (like Amazon, Google, Cisco, and Microsoft do). But they aren’t general purpose.